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asahi kasei [AK2347B] ms1419-e-00 2012/05 - 1 - AK2347B two-way radio audio & sub-audio processor 1. features ? audio processing ? tx and rx amplifier ? pre/de-emphasis circuit ? compressor and expander with no external components ? scrambler and de-scrambler in frequency inversion type (3.388khz or 3.290khz) ? limiter with level adjuster ? splatter filter for wide and narrow band ? digital controlled amplifier for microphone, modulator and demodulator sensitivity ? sub-audio filter with level adjuster for ctcss and dcs ? low power supply operation: 2.7 to 3,3v ? wide range operating for temperature: -40 to 85 c ? oscillator circuit for 3.6864mhz and 3.579545mhz crystal ? serial control interface operation ? compact plastic packaging, 24-pin ssop 2. description AK2347B includes audio filter, limiter, splatter filt er, compandor, scrambler, which is highly integrated two-way radio baseband functions for frs and lmr. audio high-pass filter shows a high attenuation in magnitude response characteristics under 250hz that supports to eliminate a subaudio tone clearly. tx limiter for deviation control has a limiting le vel adjuster by applying a dc voltage via external components. splatter filter has the magnitude response for narrowband(fc=2.55khz) and wideband(3.0khz) to meet various regulatory agencies in the world wide. compandor is no adjustment type because it incl udes all parametric components inside the chip. scrambler circuit is composed of frequency inve rsion circuit by double balanced mixer that has 3.388khz and 3.290khz carrier clock. sub-audio filter with level adjuster is available for pre- or post-filter for ctcss and dcs. there are four signal level adjusters for microphone, modulator and demodulator sensitivity by digital controlled amplifier (volume). ? pin assignment (top view) agndin agnd txino txin extin extino limlv mod vss sdata sclk csn 11 12 1 2 3 4 5 6 7 8 9 10 rxin rxino filtero rxout dino din rsaout tsaout vdd xout xin test 24 23 22 21 20 19 18 17 16 15 14 13
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 2 - 3. contents 1. features ................................................................................................... 1 2. description................................................................................................ 1 3. contents ................................................................................................... 2 4. block diagram .......................................................................................... 3 5. block functions ........................................................................................ 4 6. pin functions............................................................................................ 5 7. absolute maximum ratings ...................................................................... 7 8. recommended operating conditions ...................................................... 7 9. digital dc characteristics......................................................................... 7 10. clock input characteristics..................................................................... 8 11. current consumption.............................................................................. 8 12. analog characteristics............................................................................ 9 13. level diagram ...................................................................................... 15 14. digital ac timing .................................................................................. 16 15. register function description .............................................................. 18 16. recommended external application circuits........................................ 28 17. packaging............................................................................................. 33 18. important notice ................................................................................... 34
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 3 - 4. block diagram osc xin xout extino + vdd vss rxout tx/rx _hpf scrambler/ descrambler fc = 300hz com- pressor pre- emphasis vr4 vr3 rxlpf expan- de r mod de- emphasis filtero vr2 splatter smf - + rxa1 vr1 (hpf) - + txa1 txin txino rxin rxino fc = 2.55khz /3.0khz -6 to +4.5/1.5db -4 to +3.5/0.5db -9.6 to +3.0 /0.2db -18,-4.5 to +4.5 /0.25db adder smf 3.6864mhz / 3.579545mhz din dino - + dta1 extin - + txa2 agnd + + agndin agnd tsaout sub-audio programmable lpf vr5 rsaout -6 to +6/ 0.5db power on at mode 1,2,3,4 power on at mode 2,4 power on at mode 3,4 power on at mode 2,3,4 3 4 23 24 22 20 19 17 18 control register sdata sclk csn test 10 11 12 13 16 9 1 2 15 14 21 8 limlv 7 tc em txrx pcont hpf txsw2,1 rxsw em tc txrx sasw sasw filsw2,1 6 5 limiter lmt
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 4 - 5. block functions block function txa1 operational amplifier for gain adjustment of transmit audio signal and for the filter for preventing aliasing noise of the scf circuit in the subsequent stage. use external resistors and capacitors to set the gain to 30db or less and the cut-off frequency to around 10khz. vr1 (hpf) this circuit controls the volume for adjus ting the input level of transmit audio signal. setting registers: vr12 to vr10, adjustment ra nge: -6.0db to +4.5db in 1.5db steps compressor this circuit compresses the amplitude of tr ansmit audio signal by 1/2 in db scale. cross-point: -10dbx. this circuit is turned on and off by the tc register. pre-emphasis this circuit emphasizes the high-frequency component of transmit audio signal to improve the s/n ratio of the modulation signal. tx/rx_hpf high-pass filter to eliminate low-frequency components lower than 250hz which are included in transmit and receive audio signals. this circuit is turned on and off by the hpf register. scrambler/ descrambler this circuit inverts the spectrum distribution of transmit and receive audio signals with respect to the carrier frequency. the carrier frequency is 3.388khz or 3.290khz. the scrambler/descrambler or emphasis circuit can be selected using the em and pcont registers. these circuits cannot be used at the same time. txa2 operational amplifier for gain adjustment of external tone signal. use external resistors and capacitors to set the gain to 0db or le ss and the cut-off frequency to around 10khz. adder this circuit adds together the audio signal and external tone input signal. this circuit is controlled by the txsw2 and txsw1 register. limiter amplitude limiting circuit to suppress frequency deviation in the modulation signal. the limit level can be adjusted by applying a dc voltage to the limlv pin. when the pin is left open, the level predetermined within the device is output. this circuit is turned on and off by the lmt register. vr2 this circuit controls the volume for adjusti ng the output level on the mod pin. setting registers: vr25 to vr20, adjustment range: -3.2db to +3.0db in 0.2db steps. for coarse adjustment, switching between -6.4db and 0db is possible. splatter low-pass filter to eliminate high-frequency components higher than 3khz which are included in the limiter output signal. the cut-off frequency can be adjusted with the spl register. smf smoothing filter to eliminate the high-fre quency and clock components generated in the scf circuit. rxa1 operational amplifier for gain adjustment of the receive demodulation signal and for the filter for preventing aliasing noise in the scf circuit in the subsequent stage. use external resistors and capacitors to set the gain to 20db or less and the cut-off frequency to around 40khz. vr3 this circuit controls the volume for adjusti ng the input level of the receive demodulation signal. setting registers: vr33 to vr30, adjustment ra nge: -4.0db to +3.5db in 0.5db steps rxlpf low-pass filter to eliminate high-frequency components higher than 3khz which are included in the receive demodulation signal. de-emphasis this circuit restores the original state of the signal of which high-frequency component has been emphasized by the pre-emphasis. expander this circuit expands the signal compressed twice by the compressor in db scale to restore the original signal state. cross-point: -10dbx. the expander is turned on and off with the tc register. vr4 this circuit controls the volume for adjusting the rx output level. setting registers: vr45 to vr40 adjustment range: -18.0db, -4.5db to +4.5db in 0.25db steps
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 5 - block function dta1 operational amplifier for gain adjustment of the sub-audio lpf input signal and for the filter for preventing aliasing noise in the scf circuit in the subsequent stage. use external resistors and capacitors to set the gain to 0db or less and the cut-off frequency to around 10khz. sub-audio programmable lpf low-pass filter to eliminate components of t he dat1 signal in the transmit operation and of rxa1 signal in the receive. this circuit is controlled by the sasw register for transmit or receive and by the sa5 to sa0 for cut-off frequency. vr5 this circuit controls the volume for adjusti ng the output level from the sub-audio lpf signal. setting registers: vr54 to vr50, adjustment ra nge: -6.0db to +6.0db in 0.5db steps agnd this circuit generates the reference voltage (1/2vdd) for internal analog signals. osc this circuit generates a 3.6864mhz or 3.579545mhz reference clock signal from an external resistor and crystal oscillator. this circuit is controlled by the mcksl register. control register control registers set the switch status and vo lume for level adjustment inside the ic according to the serial input data consisting of 1-bit instruction and 4-bit address and 8-bit data. at power-up, the registers are se t to the power-down values by the power-on reset circuit. this circuit has a software reset named rstn register. (see the description of the registers) 6. pin functions pin number pin name pin type power- down status function 1 agndin ai *3) analog ground input pin this pin is connected to a capacitor to stabilize the analog ground level. 2 agnd ao *3) analog ground output pin this pin is connected to a capacitor to stabilize the analog ground level. 3 txino ao z output pin of txa1 *1) 4 txin ai z transmit audio signal input pin this pin is the inverting input pin of txa1. this pin, with resistors and capacitors externally connected, forms a microphone amplifier. 5 extin ai z external input pin this pin is the inverting input pin of txa2. this pin, with resistors and capacitors externally connected, forms a amplifier. an external signal such as a t one signal other than the audio signal can be input. 6 extino ao *3) output pin of txa2 *1) 7 limlv ai *4) limit level adjustment pin the limit level can be adjusted by applying a dc voltage to this pin. when this pin is left open, the limit level predetermined within the device is set. 8 mod ao z modulated transmit signal output pin *2) 9 vss pwr - negative power supply pin normally, apply 0v. 10 sdata db z serial data input and output control pin
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 6 - pin number pin name pin type power- down status function 11 sclk di z serial data clock input pin 12 csn di z serial data chip select input this signal is active low. 13 test do l output pin for testing this pin is assigned to test pin for pre-delivery inspection in factory. do not connect anything in normal operation. 14 xin db *5) pin for connecting a crystal oscillator a reference clock used within this ic is generated by connecting a 3.6864mhz or 3.579545mhz oscillator between this pin and the adjacent xout pin. for detailed information about the connection method and the method for supplying an external clock, see ?recommended external application circuits?. 15 xout di *5) pin for connecting a crystal oscillator 16 vdd pwr ? positive power supply pin connect this pin to a power supply ranging from 2.7v to 3.3v with less noise. connect a bypass capacitor of 0.1 f or higher between this pin and the vss pin. 17 tsaout ao z transmit sub-audio signal output pin *2) 18 rsaout ao z receive sub-audio signal output pin *2) 19 din ai z data input pin this pin is the inverting input pin of dta1. this pin, with resistors and capacitors externally connected, forms a amplifier. an external signal such as a tone signal through cpu port can be input. 20 dino ao z output pin of dta1 *1) 21 rxout ao z receive audio signal output pin *2) 22 filtero ao z rxlpf or tx/rx_hpf block output pin this pin can be used as a monitor pin for a signal such as a tone signal. the output signal on this pin includes a 57.6khz sampling-clock component. so, perform waveform processing externally as required. *2) 23 rxino ao z output pin of rxa1 *1) 24 rxin ai z demodulated receive signal input pin inverting input pin of rxa1. this pin, with resistors and capacitors externally connected, forms a pre-filter. note) a: analog, d: digital, pwr: power, i: input, o: output, b: bi-directional, z: high-z, l: low *1) output load requirement: [load impedance] > 30k , [load capacitance] < 50pf *2) output load requirement: [load impedance] > 10k , [load capacitance] < 50pf *3) agnd (=1/2vdd) level *4) agnd + 0.256(vdd-agnd) level *5) when xout pin is set to low level, xin pin goes to high-z. when xout pin is set to high level, xin pin outputs low level.
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 7 - 7. absolute ma ximum ratings parameter symbol min. max. units power supply voltage vdd -0.3 4.6 v ground level vss 0 0 v input voltage v in -0.3 vdd+0.3 v input current (except power supply pin) i in -10 +10 ma storage temperature t stg -55 130 c note) all voltages are relative to the vss pin. caution) if the device is used in conditions exceeding these values, the device may be destroyed. normal operations are not guaranteed in such extreme conditions. 8. recommended operat ing conditions parameter symbol condition min. typ. max. units operating temperature ta ? 40 85 c power supply voltage vdd 2.7 3.0 3.3 v analog reference voltage agnd 1/2vdd v note) all voltages are relative to the vss pin. 9. digital dc characteristics parameter symbol condition min. typ. max. units v ih1 sdata 0.7vdd high level input voltage v ih2 sclk, csn 0.8vdd v v il1 sdata 0.3vdd low level input voltage v il2 sclk, csn 0.2vdd v high level input current i ih v ih =vdd sdata, sclk, csn 10 a low level input current i il v il =0v sdata, sclk, csn -10 a high level output voltage v oh i oh =+0.2ma sdata vdd ? 0.4 vdd v low level output voltage v ol i ol = ? 0.4ma sdata 0.0 0.4 v
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 8 - 10. clock input characteristics parameter symbol condition min. typ. max. units remarks master clock frequency mck xin, xout 3.6864 3.579545 mhz high level input voltage v mck1_ih xin 1.5 v *1) low level input voltage v mck1_il xin 0.4 v *1) input amplitude v mck2 xin 0.2 1.0 v pp *2) *1) when directly connects to xin pin, refer to recommended external application 7) oscillator circuit fig. 7. *2) when connects to xin pin via capacitor, refer to recommended external application 7) oscillator circuit fig. 8. 11. current consumption parameter symbol condition min. typ. max. units idd0 mode 0 osc:off, audio: off, sub-audio: off 0.08 0.14 idd1 mode 1 osc: on , audio: off, sub-audio: off 0.7 1.0 idd2 mode 2 osc: on , audio: on , sub-audio: off 4.5 5.8 idd3 mode 3 osc: on , audio: off, sub-audio: on 1.6 2.1 current consumption idd4 mode 4 osc: on , audio: on , sub-audio: on 5.3 6.7 ma
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 9 - 12. analog characteristics unless otherwise specified, the following apply: mck=3.6864mhz, f=1khz, emphasis: on, compandor: on, scrambler: off, vr1=vr2=vr3=vr4=0db, hpf=lmt=1 with the external circuit shown in page.28 to 32. ?dbx? is a standardized notation to match the operating voltage and is defined by equation 0dbx = -5+20log(vdd/2)dbm. 0dbm=0.775vrms. 1) tx audio system characteristics parameter condition min. typ. max. units remarks standard input level @txino, extino -10 dbx txino to mod -1.5 0 +1.5 db absolute gain extin to mod -1.5 0 +1.5 db distortion extin to mod, extino=-3dbx when lmt is set to 0 30khz low-pass filtering -35 db limit level extin to mod without external r adjustment with external r adjustment -8.6 -7.6 -6.6 -6.6 dbx compressor linearity txino to mod txino=-44dbx txino=-50dbx relative value to 0db for mod level of -10dbx txino. -20.0 -24.0 -17.0 -20.0 -14.0 -16.0 db compressor distortion txino to mod txino=-10dbx 30khz low-pass filtering -35 db noise level with no signal input txino to mod c-message filtering -36.5 dbm vr1 attenuation error txino to mod -6.0 db to 4.5db, 1.5db/step -1.5 +1.5 db vr2 att error (vr24,23,22,21,20) txino to mod -3.2db to +3.0db, 0.2db/step -0.2 +0.2 db vr2 att error (vr25=0) txino to mod relative value when -6.4/0db is set -6.8 -6.4 -6.0 db 2) rx audio system characteristics parameter condition min. typ. max. units remarks standard input level @rxino -10 dbx rxino to filtero -1.5 0 +1.5 db absolute gain rxino to rxout -1.5 0 +1.5 db expander linearity rxino to rxout rxino=-25dbx rxino=-30dbx relative value to 0db for rxout level of -10dbx rxino -33.0 -45.0 -30.0 -40.0 -27.0 -35.0 db expander distortion rxino to rxout rxino=-5dbx 30khz low-pass filtering -35 db noise level with no signal input rxino to rxout c-message filtering -70 dbm
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 10 - parameter condition min. typ. max. units remarks vr3 attenuation error rxin0 to rxout -4.0db to +3.5db, 0.5db/step -0.5 +0.5 db vr4 attenuation error rxin0 to rxout -4.5 to +4.5db, 1.5db/step -0.25 +0.25 db vr4 att error (vr45?40=0,0,0,0,0, 0) rxin0 to rxout relative value when ?18/0db is set -20 -18 -16 db 3) audio filter characteristics 3.1) emphasis: on , compandor: off, scrambler: off parameter condition min. typ. max. units remarks 250hz -57 -40 db 300hz 2.5khz 3.0khz 6.0khz -12.5 +6.0 +4.5 -23 -9.5 +9.0 +8.5 -18 db spl=0 fc=2.55 k tx overall characteristics txino to mod relative value to gain at 1khz 300hz 2.5khz 3.0khz 6.0khz -12.5 +6.0 +7.0 -17 -9.5 +9.0 +10.5 -12 db spl=1 fc=3.0k rx overall characteristics rxino to rxaf relative value to gain at 1khz 250hz 300hz 3.0khz 6.0khz +8.5 -11.5 -38 -52 -26 +11.5 -8.5 -40 db 3.2) emphasis: off , compandor: off, scrambler: off (design target values) parameter condition min. typ. max. units remarks 250hz -50 -38 db 300hz to 2.0khz 2.5khz 3.0khz 6.0khz -1.0 -1.5 -4.0 -32 +1.0 +1.0 -1.0 -28 db spl=0 fc=2.55 k tx overall characteristics txino to mod relative value to gain at 1khz 300hz to 2.5khz 3.0khz 6.0khz -1.0 -1.5 -26 +1.0 +1.0 -22 db spl=1 fc=3.0k rx overall characteristics rxino to rxaf relative value to gain at 1khz 250hz 300hz 350hz to 3.0khz 6.0khz -1.5 -1.0 -49 -38 -38 +1.0 +1.0 -28 db
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 11 - ? audio path frequency response for tx figure 1: tx overall response with pre-emphasis. figure 2: tx overall re sponse without pre-emphasis. -60 -50 -40 -30 -20 -10 0 10 20 1.e+02 1.e+03 1.e+04 frequency(hz) gain(db) spl=0 spl=1 -60 -50 -40 -30 -20 -10 0 10 20 1.e+02 1.e+03 1.e+04 frequency(hz) gain(db) spl=0 spl=1
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 12 - ? audio path frequency response for rx figure 3: rx overall response with de-emphasis. figure 4: rx overall re sponse without de-emphasis. -60 -50 -40 -30 -20 -10 0 10 20 1.e+02 1.e+03 1.e+04 frequency(hz) gain(db) -60 -50 -40 -30 -20 -10 0 10 20 1.e+02 1.e+03 1.e+04 frequency(hz) gain(db)
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 13 - 4) scrambler characteristics 4.1) scrambler: on , emphasis: off, compandor: off, mcksl=1, scsl=0/1?3.388khz mcksl=0, scsl=0 ?3.290khz parameter condition min. typ. max. units remarks carrier frequency 3.388 3.290 khz modulated output txino to mod, rxino to rxout input level 1.0khz -10dbx measuring-freq. 2.388khz (3.388khz) measuring-freq. 2.290khz (3.290khz) -12 -10 -8 dbx high frequency rejection txino to mod, rxino to rxout input level 1.0khz -10dbx measuring-freq. 4.388khz (3.388khz) measuring-freq. 4.290khz (3.290khz) -50 dbx carrier signal leakage txino to mod, rxino to rxout input level no signal measuring-freq. 3.388khz measuring-freq. 3.290khz -50 dbx original signal leakage txino to mod, rxino to rxout input level 1.0khz -10dbx measuring-freq. 1.0khz -50 dbx 4.2) scrambler: on , emphasis: off, compandor: off, mcksl=0, scsl=1 (design target values) parameter condition min. typ. max. units remarks carrier frequency 3.390 khz modulated output txino to mod, rxino to rxout input level 1.0khz -10dbx measuring-freq. 2.390khz -12 -10 -8 dbx high frequency rejection txino to mod, rxino to rxout input level 1.0khz -10dbx measuring-freq. 4.390khz -50 dbx carrier signal leakage txino to mod, rxino to rxout input level no signal measuring-freq. 3.390khz -50 dbx original signal leakage txino to mod, rxino to rxout input level 1.0khz -10dbx measuring-freq. 1.0khz -25 dbx
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 14 - 5) sub-audio filter characteristics unless otherwise specified, the following apply: mcksl=1, sa5=1, sa4=1, sa3=0, sa2=0, sa1=0, sa0=1(fc=260.9hz), vr5=0db, 250.3hz sinusoidal wave. 5.1) analog characteristics parameter condition min. typ. max. units remarks standard input level @ tsaout -10 dbx transmit ctcss signal gain dino to tsaout -2 0 +2 db transmit ctcss signal distortion dino to tsaout 250.3hz,duty50%, 585mvp-p(@3v)rectangular wave 30khz low-pass filtering -37 -32 db standard input level @ rsaout -10 dbx receive ctcss signal gain rxino to rsaout -2 0 +2 db receive ctcss signal distortion rxino to rsaout rxino=-10dbx input 30khz low-pass filtering -37 -32 db vr5 attenuation error rxino to rsaout -6.0 to +6.0db, 0.5db/step -0.5 +0.5 db 5.2) filter characteristics parameter condition min. typ. max. units remarks overall characteristics @fc=260.9hz dino to tsaout relative value to gain at 100hz 50 c> 240hz 250hz 300hz -1.0 -1.5 +1.0 +1.0 -38 db fig.5 sub-audio response characteristics -60 -50 -40 -30 -20 -10 0 10 20 1.e+01 1.e+02 1.e+03 frequency(hz) gain(db)
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 15 - 13. level diagram 1) tx system: txrx=0 2) rx system: txrx=1 note) dbx is a standardized notation to match the operating voltage and is defined by equation 0dbx = -5 + 20log(vdd/2)dbm. smf limiter splatter +vr2 txa1 vr1 compressor pre-emphasis txhpf txa2 scrm /descrm 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 txino +4.5 -6.0 db 0 +3.0 -9.6 db 0 crosspoint -10dbx 0db 0db -7.6dbx extin 0 -10 -44 -50 -30 -27 -16 -5.5 -5 -10 -10 -7.0 -19.2 -10dbx (audio) dbx txin mod g = 30db -27dbx -30dbx 0db 0db f=1khz smf expander rxa1 vr3 rxlpf de-emphasis rxhpf scrm /descrm 10 0 -10 -20 -2 5 -30 -40 -4 5 -50 -60 rxino +3. 5 -4.0 db 0 +4.5 -18.0 db 0 crosspoint -10dbx -5db -5db +5db -5 -10 -25 -30 -25 -20 -14 -6.5 -5 0 -10 -5.5 -28 0dbx (max.) -10dbx (typ.) dbx rxin rxout vr4 g = 20db 0db filtero g = 0db -40dbx -50dbx -50 -40 f=1khz
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 16 - 14. digital ac timing 1) serial interface timing AK2347B is connected to a cpu by three-wired interface through csn, sclk and sdata pins, which can make reading and writing data for control registers. serial data named sdata is consist of 1-bit read and write instruction(r/w), 4-bit address (a3 to a0) and 8-bit data(d7 to d0) in one frame. write mode read mode r/w : instruction bit controls to write data to AK2347B or read back from it. when set to low, AK2347B is in write mode. when set to high, AK2347B is in read mode. a3 to a0: register address to be accessed. d7 to d0: write or read date to be accessed. (1) csn(chip select) is normally selected high for disable. when csn is set to low, serial interface becomes active. (2) in write mode, instruction, address and data input from sdata pin are synchronized and latched with the rising edge of 14 iterations of sclk clock. set to low between address a0 and data d7. in read mode, instruction and address are synchronized and latched with the rising edge of 5 iterations of sclk clock. and the register data are output from sdata pin synchronized with the falling edge of 9 iterations of sclk clock. the date between address a0 and data d7 is unstable. a cpu port to sdata pin is fixed to high-z during the interval that sdata outputs the read data. (3) AK2347B assumes that write and read is set by 14 iterations sclk clock while csn sets to low. if sclk iterations are less or more than 14 clocks, serial data would not set properly. csn sclk sdata ( in p ut ) r/w sdata ( out p ut ) hi-z a 3 a 2 a 1 a 0 d7 d6 d5 d4 d3 d2 d1 d0 csn sclk sdata ( in p ut ) r/w sdata ( out p ut ) hi-z a 3 a 2 a 1 a 0 d7 d6 d5 d4 d3 d2 d1 d0 hi-z
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 17 - 2) detail timing chart write mode read mode rising and falling time parameter symbol condition min. typ. max. unit csn setup time tcss 100 ns sdata setup time tds 100 ns sdata hold time tdh 100 ns sclk high time twh 500 ns sclk low time twl 500 ns csn hold time tcsh 100 ns sdata hi-z setup time tsd 500 ns sclk to sdata delay time tdd 20pf load 500 ns csn to sdata delay time tcd 20pf load 100 ns sclk rising time tr 100 ns sclk falling time tf 100 ns note) in digital input timing, rising time is relative to vih and falling time is relative to vil. in digital output timing, rising time is relative to voh and falling time is relative to vol. csn sclk sdata ( in p ut ) tcss twh twl tdh tds r/w a 3 a 2 a 1 a 0d7d6d0 d1 sdata ( out p ut ) hi-z tcsh csn sclk sdata ( in p ut ) tcss tsd tdd r/w a 3 a 2 a 1 a 0 sdata ( out p ut ) hi-z tcsh tcd hi-z d7 d6 d0 d1 sclk vil vih tr tf
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 18 - 15. register function description 1) register configuration address data a3 a2 a1 a0 function d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 0 control register 1 bs3 bs2 bs1 txrx txsw2 txsw1 rxsw mcksl 0 0 0 1 control register 2 tc em pcont spl scsl lmt hpf sasw 0 0 1 0 volume register 1 vr54 vr53 vr52 vr51 vr50 vr12 vr11 vr10 0 0 1 1 volume register 2 filsw2 filsw1 vr25 vr24 vr23 vr22 vr21 vr20 0 1 0 0 volume register 3 ? ? ? ? vr33 vr32 vr31 vr30 0 1 0 1 volume register 4 ? ? vr45 vr44 vr43 vr42 vr41 vr40 0 1 1 0 sub-audio frequency ? ? sa5 sa4 sa3 sa2 sa1 sa0 0 1 1 1 software-reset & revision register ? ? ? rstn revnum[3:0] 1 0/1 0/1 0/1 reserved x x x x x x x x note1) the mark ? ? ? means that a write to those bits does not have any influence on the lsi operation and read back the writing data. note2) all registers except address 0111 are write and readable registers. caution) never access the mark ?x? test register and unlisted bits of vr33 to vr30, vr45 to vr40 and sa5 to sa1. if an access is made to these addresses inadvertently, the lsi operation is not guaranteed.
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 19 - 2) descriptions of registers 2.1) control register 1 address data a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 0 bs3 bs2 bs1 txrx txsw2 txsw1 rxsw mcksl when power-down 0 0 0 1 1 1 1 1 2.1.1) operation mode setting bs3 bs2 bs1 mode name osc and agnd system tx and rx audio system sub-audio system 0 0 0 mode 0 (power-down) off off off 0 0 1 mode 1 (standby) on off off 0 1 0 mode 2 on on off 0 1 1 mode 3 on off on 1 0/1 0/1 mode 4 on on on 2.1.2) tx and rx setting function data item 0 1 remarks txrx tx-rx switch tx operation *1) rx operation *2) *3) rxsw rx audio mute mute normal operation *4) mcksl master clock frequency 3.579545mhz 3.6864mhz 2.1.3) tx path setting txsw2 txsw1 function remarks 1 1 mute (agnd limiter splatter) 0 1 audio system operation (hpf limiter splatter) 1 0 external signal operation (extin pin limiter splatter) 0 0 audio signal and external signal added together (hpf+extin pin adder limiter splatter) *1) when txrx is set to 0 and rxsw is set to 1, the signal input from the txin pin can be output to the rxout pin. in this case, because use of the scrambler/descrambler is inhibited, be sure to set pcont to 1. when rxsw is set to 0, the rxout pin output is muted. *2) when txrx is set to 1 and txsw2 and txsw1 are set to 0 and 1 respectively, the signal input from the rxin pin can be output to the mod pin. in this case, because use of the scrambler/descrambler is inhibited, be sure to set pcont to 1. when txsw2 and txsw1 are set to 1 and 1 respectively, the mod pin output is muted. *3) set the gain level for each circuit block properly according to the level diagrams on page 15. *4) if rxsw is set to 0, the filtero pin output is not muted.
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 20 - 2.2) control register 2 address data a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 1 tc em pcont spl scsl lmt hpf sasw when power-down 1 1 1 1 0 1 1 1 function data item 0 1 remarks tc compandpr off (bypass) on (active) spl splatter cut-off frequency 2.55khz 3.0khz scrambler carrier frequency mcksl is set to 0 3.290khz 3.390khz scsl mcksl is set to 1 3.388khz 3.388khz lmt limiter off (bypass) on (active) hpf tx/rx hpf off (bypass) on (active) sasw sub-audio operation din pin o tsaout pin rxin pin o rsaout pin em pcont function remarks 1 1 emphasis: on (active), scrambler/descrambler: off (bypass) 0 1 emphasis: off (bypass), scrambler/descrambler:off (bypass) 0/1 0 emphasis: off (bypass), scrambler/descrambler:on (active)
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 21 - 2.3) volume register 1 address data a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 0 0 1 0 vr54 vr53 vr52 vr51 vr50 vr12 vr11 vr10 when power-down 0 1 1 0 0 1 0 0 vr54 vr53 vr52 vr51 vr50 vr5 gain (db) 0 0 0 0 0 -6.0 0 0 0 0 1 -5.5 0 0 0 1 0 -5.0 0 0 0 1 1 -4.5 0 0 1 0 0 -4.0 0 0 1 0 1 -3.5 0 0 1 1 0 -3.0 0 0 1 1 1 -2.5 0 1 0 0 0 -2.0 0 1 0 0 1 -1.5 0 1 0 1 0 -1.0 0 1 0 1 1 -0.5 0 1 1 0 0 0.0 0 1 1 0 1 +0.5 0 1 1 1 0 +1.0 0 1 1 1 1 +1.5 1 0 0 0 0 +2.0 1 0 0 0 1 +2.5 1 0 0 1 0 +3.0 1 0 0 1 1 +3.5 1 0 1 0 0 +4.0 1 0 1 0 1 +4.5 1 0 1 1 0 +5.0 1 0 1 1 1 +5.5 1 1 0 0 0 +6.0 vr12 vr11 vr10 vr1 gain (db) 0 0 0 -6.0 0 0 1 -4.5 0 1 0 -3.0 0 1 1 -1.5 1 0 0 0.0 1 0 1 +1.5 1 1 0 +3.0 1 1 1 +4.5
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 22 - 2.4) volume register 2 address data a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 0 0 1 1 filsw2 filsw1 vr25 vr24 vr23 vr22 vr21 vr20 when power-down 1 1 1 1 0 0 0 0 filsw2 filsw1 function remarks 1 1 filtero pin output is muted. 0 1 rxlpf circuit signal is output on filtero pin. 0/1 0 tx/rx_hpf circuit signal is output on filtero pin. vr25 vr2 gain (db) 0 -6.4 1 0.0 vr24 vr23 vr22 vr21 vr20 vr2 g ain ( db ) 0 0000 -3.2 0 0 0 0 1 -3.0 0 0 0 1 0 -2.8 0 0 0 1 1 -2.6 0 0 1 0 0 -2.4 0 0 1 0 1 -2.2 0 0 1 1 0 -2.0 0 0 1 1 1 -1.8 0 1 0 0 0 -1.6 0 1 0 0 1 -1.4 0 1 0 1 0 -1.2 0 1 0 1 1 -1.0 0 1 1 0 0 -0.8 0 1 1 0 1 -0.6 0 1 1 1 0 -0.4 0 1 1 1 1 -0.2 1 0 0 0 0 0.0 1 0001 +0.2 1 0 0 1 0 +0.4 1 0 0 1 1 +0.6 1 0 1 0 0 +0.8 1 0 1 0 1 +1.0 1 0 1 1 0 +1.2 1 0 1 1 1 +1.4 1 1 0 0 0 +1.6 1 1 0 0 1 +1.8 1 1 0 1 0 +2.0 1 1 0 1 1 +2.2 1 1 1 0 0 +2.4 1 1 1 0 1 +2.6 1 1 1 1 0 +2.8 1 1 1 1 1 +3.0
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 23 - 2.5) volume register 3 address data a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 0 1 0 0 ? ? ? ? vr33 vr32 vr31 vr30 when power-down ? ? ? ? 1 0 0 0 vr33 vr32 vr31 vr30 vr3 gain (db) 0 0 0 0 -4.0 0 0 0 1 -3.5 0 0 1 0 -3.0 0 0 1 1 -2.5 0 1 0 0 -2.0 0 1 0 1 -1.5 0 1 1 0 -1.0 0 1 1 1 -0.5 1 0 0 0 0.0 1 0 0 1 +0.5 1 0 1 0 +1.0 1 0 1 1 +1.5 1 1 0 0 +2.0 1 1 0 1 +2.5 1 1 1 0 +3.0 1 1 1 1 +3.5
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 24 - 2.6) volume register 4 address data a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 0 1 0 1 ? ? vr45 vr44 vr43 vr42 vr41 vr40 when power-down ? ? 0 1 0 0 1 1 vr45 vr44 vr43 vr42 vr41 vr40 vr4 gain (db) 0 0 0 0 0 0 -18.0 0 0 0 0 0 1 -4.50 0 0 0 0 1 0 -4.25 0 0 0 0 1 1 -4.00 0 0 0 1 0 0 -3.75 0 0 0 1 0 1 -3.50 0 0 0 1 1 0 -3.25 0 0 0 1 1 1 -3.00 0 0 1 0 0 0 -2.75 0 0 1 0 0 1 -2.50 0 0 1 0 1 0 -2.25 0 0 1 0 1 1 -2.00 0 0 1 1 0 0 -1.75 0 0 1 1 0 1 -1.50 0 0 1 1 1 0 -1.25 0 0 1 1 1 1 -1.00 0 1 0 0 0 0 -0.75 0 1 0 0 0 1 -0.50 0 1 0 0 1 0 -0.25 0 1 0 0 1 1 0.00 0 1 0 1 0 0 +0.25 0 1 0 1 0 1 +0.50 0 1 0 1 1 0 +0.75 0 1 0 1 1 1 +1.00 0 1 1 0 0 0 +1.25 0 1 1 0 0 1 +1.50 0 1 1 0 1 0 +1.75 0 1 1 0 1 1 +2.00 0 1 1 1 0 0 +2.25 0 1 1 1 0 1 +2.50 0 1 1 1 1 0 +2.75 0 1 1 1 1 1 +3.00 1 0 0 0 0 0 +3.25 1 0 0 0 0 1 +3.50 1 0 0 0 1 0 +3.75 1 0 0 0 1 1 +4.00 1 0 0 1 0 0 +4.25 1 0 0 1 0 1 +4.50
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 25 - 2.7) sub-audio lpf frequency address data a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 0 1 1 0 ? ? sa5 sa4 sa3 sa2 sa1 sa0 when power-down ? ? 1 1 0 0 0 1 mcksl=0(3.579545m) mcksl=1(3.6864mhz) sa5 sa4 sa3 sa2 sa1 sa0 divide *1) cut-off frequency (hz) target ctcss (hz) cut-off frequency (hz) target ctcss (hz) 0 0 0 0 0 0 640 59.4 - 61.1 - 0 0 0 0 0 1 630 60.3 - 62.1 - 0 0 0 0 1 0 620 61.3 - 63.1 - 0 0 0 0 1 1 610 62.3 - 64.1 - 0 0 0 1 0 0 600 63.3 - 65.2 - 0 0 0 1 0 1 590 64.4 - 66.3 - 0 0 0 1 1 0 580 65.5 - 67.5 - 0 0 0 1 1 1 570 66.7 - 68.6 - 0 0 1 0 0 0 560 67.8 - 69.9 - 0 0 1 0 0 1 550 69.1 - 71.1 - 0 0 1 0 1 0 540 70.3 - 72.5 67.0 0 0 1 0 1 1 530 71.7 67.0 73.8 - 0 0 1 1 0 0 520 73.1 - 75.2 69.3 0 0 1 1 0 1 510 74.5 69.3 76.7 71.9 0 0 1 1 1 0 500 76.0 - 78.3 - 0 0 1 1 1 1 490 77.6 71.9 79.8 74.4 0 1 0 0 0 0 480 79.2 - 81.5 - 0 1 0 0 0 1 470 80.6 74.4 83.3 77.0 0 1 0 0 1 0 460 82.6 77.0 85.1 79.7 0 1 0 0 1 1 450 84.4 - 87.0 - 0 1 0 1 0 0 440 86.3 79.7 89.0 82.5 0 1 0 1 0 1 430 88.4 82.5 91.0 85.4 0 1 0 1 1 0 420 90.4 - 93.2 - 0 1 0 1 1 1 410 92.7 85.4 95.5 88.5 0 1 1 0 0 0 400 95.0 88.5 97.8 91.5 0 1 1 0 0 1 390 97.4 91.5 100.3 - 0 1 1 0 1 0 380 100.0 - 103.0 94.8 0 1 1 0 1 1 370 102.7 94.8 105.8 97.4 0 1 1 1 0 0 360 105.6 97.4 108.7 100.0 0 1 1 1 0 1 350 108.6 100.0 111.8 103.5 0 1 1 1 1 0 340 111.8 103.5 115.1 107.2 0 1 1 1 1 1 330 115.1 107.2 118.6 110.9
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 26 - mcksl=0(3.579545m) mcksl=1(3.6864mhz) sa5 sa4 sa3 sa2 sa1 sa0 divide *1) cut-off frequency (hz) target ctcss (hz) cut-off frequency (hz) target ctcss (hz) 1 0 0 0 0 0 320 118.8 110.9 122.3 114.8 1 0 0 0 0 1 310 122.5 114.8 126.2 118.8 1 0 0 0 1 0 300 126.6 118.8 130.5 123.0 1 0 0 0 1 1 290 131.0 123.0 135.0 127.3 1 0 0 1 0 0 280 135.7 127.3 139.8 131.8 1 0 0 1 0 1 270 140.7 131.8 144.9 136.5 1 0 0 1 1 0 260 146.2 136.5 150.5 141.3 1 0 0 1 1 1 250 152.0 141.3 156.5 146.2 1 0 1 0 0 0 240 158.3 146.2 151.4 163.0 151.4 1 0 1 0 0 1 230 165.2 156.7 170.1 156.7 162.2 1 0 1 0 1 0 220 172.7 162.2 177.9 167.9 1 0 1 0 1 1 210 180.9 167.9 173.8 186.4 173.8 1 0 1 1 0 0 200 190.0 179.9 195.6 179.9 186.2 1 0 1 1 0 1 190 200.0 186.2 192.8 205.9 192.8 1 0 1 1 1 0 180 211.1 203.5 217.3 203.5 210.7 1 0 1 1 1 1 170 222.9 210.7 229.6 218.1 1 1 0 0 0 0 160 237.5 218.1 225.7 244.5 225.7 233.6 1 1 0 0 0 1 150 253.2 233.6 241.8 260.9 241.8 250.3 1 1 0 0 1 0 140 271.3 250.3 (254.1) 279.5 (254.1) (268.8) 1 1 0 0 1 1 130 292.4 (268.8) 300.9 - 1 1 0 1 0 0 120 316.7 - 326.0 - 1 1 0 1 0 1 110 345.3 - 355.8 - 1 1 0 1 1 0 100 379.9 - 391.3 - 1 1 0 1 1 1 90 422.2 (403.2) 434.7 (403.2) 1 1 1 0 0 0 80 475.0 - 489.0 - 1 1 1 0 0 1 70 542.7 - 559.1 - *1) divide = 10 x [64 ? (register setting value)] this equation states that divide is divided number of master clock.
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 27 - 2.8) software reset & revision register address data a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 0 1 1 1 ? ? ? rstn revnum[3:0] when power-down ? ? ? 1 0 0 1 0 2.8.1) software rest when d4: rstn data is set to 0, software reset is executed and all register data is set to power-down status and. this register is a write only register and set to 1 automatic after completing software reset. 2.8.2) revision register when d3 to d0 data is accessed, users can read the number of mask revision. this register is a read only register.
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 28 - 16. recommended external ap plication circuits 1) txa1 amplifier this circuit can be used as the tx microphone amplifier. set the gain to 30db or less. if there is a possibility that a high frequency noise component over 100khz is input, form a first or second order anti-aliasing filter. the following gives a sample configuration of a second order lpf with a gain of 30db and cut-off frequency of 10khz: 2) txa2 amplifier this amplifier is used for adjusting the gain of the tone signal. set the gain to 0db or less. for high frequency noise over 100khz, form an anti-aliasing filter. the following gives a sample configuration of a second order lpf with a gain of 0db and cut-off frequency of 13khz: r3 c1=0.47uf r1=r2=10k _ + lsi c2 r1 txa1 txin txino 3 4 c3 c2=33pf c1 r2 r3=330k c3=2200pf agnd 2 r3 c1=0.47uf r1=r2=r3=51k _ + lsi c2 r1 txa2 extin extino 6 5 c3 c2=100pf c1 r2 c3=470pf agnd 2
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 29 - 3) rxa1 amplifier this amplifier is used for adjusting the gain of the rx signal. set the gain to 20db or less. for high frequency noise over 100khz, form an anti-aliasing filter. the following gives a sample configuration of a second order lpf with a gain of 20db and cut-off frequency of 39khz: 4) dta1 amplifier this amplifier is used for adjusting the gain of the signal to sub-audio programmable lpf. set the gain to 0db or less. for high frequency noise over 100khz, form an anti-aliasing filter. the following gives a sample configuration of a second order lpf with a gain of 0db and cut-off frequency of 7.2khz: r2 c1=0.47uf r1=r2=100k : _ + lsi c2 r1 dta1 din dino 20 19 c2=220pf c1 c3=470pf r3 c1=0.47uf r1=10k : _ + lsi c2 r1 rxa1 rxin rxino 23 24 c3 c2=33pf c1 r2 r2=9.1k : r3=100k : c3=560pf agnd 2
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 30 - 5) power supply stabilizing capacitors connect capacitors between vdd and vss pins to e liminate ripple and noise included in power supply. for maximum effect, the capacitors should be placed at a shortest distance between the pins. 6) agnd stabilizing capacitors it is recommended that capacitors with 0.3 f or lager be connected between vss and the agnd and agndin pins to stabilize the agnd signal. the capacitors must be placed as close to the pins as possible. agndin lsi c agnd c c=1uf 1 2 lsi c2 vdd vss c1 c1=22uf (electrolytic cap) c2=0.1uf (ceramic cap) vdd vss 16 9
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 31 - 7) oscillator circuit when the built-in oscillator circuit is to be used, connect a 3.6864mhz or 3.579545mhz crystal oscillator and a capacitor as shown in fig. 6. the internal buffer is designed to allow stable oscillation of a crystal oscillator for the electrical equivalent circuitry with a resonance resistance of 150 (max.) and a shunt capacitance of 5pf (max.) . it is recommended that 22pf capacitors be connected externally so that the total load capacitance is 16pf (5pf + 22pf//22pf) or less. place the oscillator, resistor, and capacitors as close to the xin and xout pins as possible. when an external clock is to be supplied, connect the clock line as shown in fig. 7 or fig. 8 according to the clock amplitude level. the circuit in the first stage of the xin pin has a constant threshold voltage (0.8v). therefore, if the high level of the input clock is 1.5v or higher and the low level is 0.4v or lower, connect the clock signal as shown in fig. 7. if the input clock amplitude (p-p value) is between 0.2v and 1.0v, connect the clock signal as shown in fig. 8. when the clock is to be shared with peripheral ics, the clock must be input and output on the xin pin. the clock amplitude must not exceed the absolute maximum ratings. fig. 8 lsi xin 0.01uf xout 1m 3.6864mhz external clock in 3.579545mhz lsi xin 22pf xout 1m 22pf 3.6864mhz fig. 6 3.579545mhz lsi xin xout 3.6864mhz fig. 7 external clock in 14 15 3.579545mhz
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 32 - 8) limlv pin the limlv pin is used for adjusting the limit level of the limiter circuit. this pin may be left open or may be used by connecting resistors as shown in the figure below. when the pin is left open, a predetermined limit level can be obtained. the limit level is expressed as follows: hvref = 0.256 (vdd - agnd) [vo-p] for example, let vdd be 3v. the limit level is calculated as follows: hvref = 0.256 (3.0 - 1.5) = 0.384vo-p then, 1.5 0.384v is the typical value of the limit level. when a dc voltage higher than the agnd voltage level (= 1/2vdd) is applied to the pin through resistors, the limit level can be adjusted. the limit level is the difference between limlv and agnd and is expressed as agnd (limlv - agnd). let vdd be 3v. the limit level is calculated as follows: limlv=1.6v 1.5 0.1v 1.7v 1.5 0.2v 1.8v 1.5 0.3v 1.9v 1.5 0.4v 1.933v 1.5 0.433v (equivalent to -6.6dbx (max.)) then, the above values are obtained as the typical limit levels. because agnd level is used as the reference level for the limiter circuit operation as mentioned above, when resistors are connected, they should be connected so that vdd and agnd are separated by these resistors to supply a dc level to the limlv pin. in addition, make adjustments so that the sum of resistance (r1 + r2) is around 51k . lsi limlv r1 vdd vss r2 r1+r2 a gnd 7 2
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 33 - 17. packaging ? marking [ contents of ywwlz ] y: last digit of calendar year. (year 2011->1, 2012->2) ww: manufacturing week number. l: lot identification, given to each product lot which is made in a week. lot id is given in alphabetical order (a, b, c?). z: assembly plant code ? 24-pin ssop mechanical outline :?:::w :w :?::?:?:?:?:w ::?:?:: 8.40 max unit : mm 1 3 24 11 2 0.10 5.9 ma x 0 to 8 0.13 m 0.100.10 2.10 max 0.600.15 7.900.2 0 0.650.08 0.300.10 0.220.05
asahi kasei [AK2347B] ms1419-e-00 2012/05 - 34 - 18. important notice important notice z these products and their s pecifications are subject to change wi thout notice. when you consider any use or ap plication of these products, please make inquiries the sales office of asahi kasei microdevices corporation (akm) or authorized distributors as to current status of the products. z descriptions of external circuits, application circuits, software and ot her related information contained in this document are provided only to ill ustrate the operation and application examples of the semiconductor products. you are fully responsible for the in corporation of these external circuits, application circuits, software and other related inform ation in the design of your equipments. akm assumes no responsibility for any lo sses incurred by you or third parties arising from the use of these informat ion herein. akm assumes no liabilit y for infringement of any patent, intellectual property, or other rights in the applicati on or use of such inform ation contained herein. z any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the count ry of export pertaining to customs and tariffs, currency ex change, or strategic materials. z akm products are neither intended nor au thorized for use as critical components note1) in any safety, life support, or other haz ard related device or system note2) , and akm assumes no responsibility for such use, exc ept for the use approved with t he express written consent by representative director of akm. as used here: note1) a critical component is one whose failu re to function or perform may reasonably be expected to result, whether directly or indirectly , in the loss of the safe ty or effectiveness of the device or system containing it, and which mu st therefore meet very high standards of performance and reliability. note2) a hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nucl ear energy, or other fields, in which its failure to function or perfo rm may reasonably be expected to result in loss of life or in significant injury or damage to person or property. z it is the responsibility of the buy er or distributor of akm products, who distributes, di sposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and t he buyer or distributor agrees to assume any and all responsibility and liability for and hold akm harmless from any and all claims arising from the use of said product in the absence of such notification.

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